summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorDavid Lamparter <equinox@diac24.net>2012-05-21 19:10:01 +0200
committerDavid Lamparter <equinox@diac24.net>2012-05-21 19:10:01 +0200
commit28506241e9c0b81b6a2c090471762d2142935793 (patch)
tree37ac75ebe3b260fc5301e2e2a918dec6377ea002
parentc10ccd080d1b0afa3cba31b66f1f4323443d231a (diff)
can: more cleanup/r0keting
-rw-r--r--can.c32
1 files changed, 19 insertions, 13 deletions
diff --git a/can.c b/can.c
index b5c328d..706fdb3 100644
--- a/can.c
+++ b/can.c
@@ -16,8 +16,7 @@ static volatile bool canint = false;
ISR(INT0_vect)
{
- uart_puts("can: interrupt\n");
- canint = true;
+ canint = true;
}
static uint8_t spi_wrrd(uint8_t out)
@@ -81,14 +80,15 @@ static void can_init(void)
{
spi_perform(MCP2515_WRITE, A_CANCTRL,
0x80); /* CANCTRL: config mode */
- spi_perform(MCP2515_WRITE, A_CNF3,
- 0x01, /* CNF3 */
- 0x81, /* CNF2 */
#ifdef R0KET
- 0x05,
+#define CNF1 0x05 /* 8 MHz crystal, divide by 6 */
#else
- 0x0b, /* CNF1 */
+#define CNF1 0x0b /* 16 MHz crystal, divide by 12 */
#endif
+ spi_perform(MCP2515_WRITE, A_CNF3,
+ 0x01, /* CNF3 */
+ 0x81, /* CNF2 */
+ CNF1, /* CNF1 */
0xa7 /* CANINTE: MERRE, ERRIE, TX0IE, RX1IE, RX0IE */
);
spi_perform(MCP2515_WRITE, A_RXB1CTRL,
@@ -134,19 +134,24 @@ static void can_send(uint32_t daddr, uint8_t len, uint8_t *data)
spi_perform(MCP2515_RTS | 0x01);
}
+#ifndef R0KET
static void can_rxh(uint8_t buffer)
{
- uint8_t dlc, c;
+ uint8_t dlc, c, rtr;
+ uint32_t addr;
+
if (buffer)
uart_puts("can: RX1IF\n");
else
uart_puts("can: RX0IF\n");
spi_ss(0);
spi_wrrd(0x90 + 0x04 * buffer);
- uart_puthex(spi_wrrd(0xff));
- uart_puthex(spi_wrrd(0xff));
- uart_puthex(spi_wrrd(0xff));
- uart_puthex(spi_wrrd(0xff));
+ addr = 0;
+#define rdaddr() c = spi_wrrd(0xff); uart_puthex(c); addr <<= 8; addr |= c
+ rdaddr();
+ rdaddr();
+ rdaddr();
+ rdaddr();
dlc = spi_wrrd(0xff);
uart_puthex(dlc);
uart_puts("\n");
@@ -193,12 +198,13 @@ static void can_int(void)
spi_perform(MCP2515_WRITE, A_CANINTF, 0x00, 0x00);
}
+#endif
static void can_preinit(void)
{
spi_ss(1);
#ifndef R0KET
- DDRB = (1 << B_SCK) | (1 << B_MOSI) | (1 << B_SS);
+ DDRB |= (1 << B_SCK) | (1 << B_MOSI) | (1 << B_SS);
/* divisor: 0 0 0 = fosc / 4 = 2 MHz */
SPCR = (1 << SPE) | (1 << MSTR);