1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
|
#define F_CPU 8000000
#include <stdint.h>
#include <stdbool.h>
#include <avr/io.h>
#include <avr/interrupt.h>
#include <avr/pgmspace.h>
#include <util/delay.h>
const uint8_t __signature[3] __attribute__((section (".signature"), used)) =
{ SIGNATURE_2, SIGNATURE_1, SIGNATURE_0 };
#include "uart.c"
#define B_SCK 5
#define B_MISO 4
#define B_MOSI 3
#define B_SS 2
#define D_TXD 1
#define D_DALII 3
#define D_DALIO 4
#define D_LED1 5
#define D_LED2 6
#include "dali2.c"
#define spi_ss(x) PORTB = ((x) << B_SS) | 0x3;
static volatile bool canint = false;
ISR(INT0_vect)
{
uart_puts("can: interrupt\n");
canint = true;
}
static uint8_t spi_wrrd(uint8_t out)
{
SPDR = out;
while (!(SPSR & (1 << SPIF)))
;
return SPDR;
}
static void spi_performpgm(const uint8_t * PROGMEM cmds, uint8_t len)
{
const uint8_t * PROGMEM end = cmds + len;
uint8_t c;
spi_ss(0);
while (cmds < end) {
c = pgm_read_byte(cmds);
spi_wrrd(c);
cmds++;
}
spi_ss(1);
}
#define spi_perform(...) do { \
static const uint8_t _mycmds[] PROGMEM = { __VA_ARGS__ }; \
spi_performpgm(_mycmds, sizeof(_mycmds)); } while (0)
/* CAN configuration:
*
* CNF1 SJW = 1TQ 00xxxxxx
* BRP = /12 xx001011 (16 MHz assumed)
* = 0x0b
* CNF2 BTLMODE = cfg 1xxxxxxx
* SAM = once x0xxxxxx
* PS1 = 1TQ xx000xxx
* prop = 2TQ xxxxx001
* = 0x81
* CNF3 WAKFIL = off x0xxxxxx
* PS2 = 2TQ xxxxx001
* = 0x01
*/
#define MCP2515_WRITE 0x02
#define MCP2515_READ 0x03
#define MCP2515_RTS 0x80
#define A_CNF3 0x28
#define A_CANINTF 0x2c
#define A_CANCTRL 0x2f
#define A_TXB0CTRL 0x30
#define A_TXB0SIDH 0x31
#define A_RXB1CTRL 0x70
static void can_init(void)
{
spi_perform(MCP2515_WRITE, A_CANCTRL,
0x80); /* CANCTRL: config mode */
spi_perform(MCP2515_WRITE, A_CNF3,
0x01, /* CNF3 */
0x81, /* CNF2 */
0x0b, /* CNF1 */
0xa4 /* CANINTE: MERRE, ERRIE, TX0IE */
);
spi_perform(MCP2515_WRITE, A_RXB1CTRL,
0x60); /* x, RXM, x, RXRTR, FILHIT */
spi_perform(MCP2515_WRITE, A_CANCTRL,
0x00); /* CANCTRL: normal mode */
}
static uint8_t can_CANSTAT(void)
{
uint8_t canstat;
spi_ss(0);
spi_wrrd(0x03);
spi_wrrd(0x2e); /* addr(CANCTRL) */
canstat = spi_wrrd(0xff); /* CANSTAT */
spi_ss(1);
uart_puts("can: CANSTAT ");
uart_puthex(canstat);
uart_puts("\n");
return canstat;
}
static void can_send(void)
{
uart_puts("can: transmit\n");
spi_perform(MCP2515_WRITE, A_TXB0SIDH,
0x55, /* ID 10:3 */
0x40, /* ID 2:0, x, EXIDE, x, EID 17:16 */
0x00, /* EID 15:8 */
0x00, /* EID 7:0 */
0x00); /* x, RTR, xx, DLC */
spi_perform(MCP2515_RTS | 0x01);
}
static void can_int(void)
{
uint8_t canintf, eflg, canstat;
uart_puts("can: irqh<");
spi_ss(0);
spi_wrrd(MCP2515_READ);
spi_wrrd(A_CANINTF);
canintf = spi_wrrd(0xff);
eflg = spi_wrrd(0xff);
canstat = spi_wrrd(0xff);
spi_ss(1);
uart_puthex(canintf);
uart_puthex(eflg);
uart_puthex(canstat);
uart_puts(">\n");
if (canintf & 0x80 || canintf & 0x04) {
uint8_t txb0ctrl;
spi_ss(0);
spi_wrrd(0x03);
spi_wrrd(0x30);
txb0ctrl = spi_wrrd(0xff);
spi_ss(1);
uart_puts("can: TXB0CTRL ");
uart_puthex(txb0ctrl);
uart_puts("\n");
}
if (canintf & 0x02) {
uint8_t rxb1dlc, c;
uart_puts("can: RX1IF\n");
spi_ss(0);
spi_wrrd(0x94);
uart_puthex(spi_wrrd(0xff));
uart_puthex(spi_wrrd(0xff));
uart_puthex(spi_wrrd(0xff));
uart_puthex(spi_wrrd(0xff));
rxb1dlc = spi_wrrd(0xff);
uart_puthex(rxb1dlc);
uart_puts("\n");
for (c = 0; c < rxb1dlc; c++)
uart_puthex(spi_wrrd(0xff));
uart_puts("\n");
spi_ss(1);
}
spi_perform(MCP2515_WRITE, A_CANINTF, 0x00);
}
int main(void)
{
uint8_t status;
uart_init();
DDRD |= (1 << D_LED1) | (1 << D_LED2 ) | (1 << D_TXD) | (1 << D_DALIO);
spi_ss(1);
DDRB = (1 << B_SCK) | (1 << B_MOSI) | (1 << B_SS);
/* divisor: 0 0 0 = fosc / 4 = 2 MHz */
SPCR = (1 << SPE) | (1 << MSTR);
/* INT0 */
EICRA = (1 << ISC01);
EIMSK = (1 << INT0);
sei();
uart_puts("\nspi: init ok\n");
_delay_ms(25);
dali_init();
_delay_ms(25);
spi_ss(0);
spi_wrrd(0xc0);
spi_ss(1);
_delay_ms(50);
spi_ss(0);
spi_wrrd(0xb0);
status = spi_wrrd(0xff);
spi_ss(1);
uart_puts("can: status ");
uart_puthex(status);
uart_puts("\n");
can_init();
can_CANSTAT();
dali_send(0xff08);
while (dali_queue_busy())
;
dali_send(0xff08);
for (int i = 0; i < 40; i++)
_delay_ms(25);
uint8_t ctr = 0;
while (1) {
if (canint) {
canint = false;
can_int();
}
_delay_ms(40);
ctr++;
if (ctr == 40)
dali_send(0xff91);
if (ctr == 80)
dali_send(0xff99);
if (ctr == 120)
dali_send(0xffa0);
if (ctr == 160) {
dali_send(0xff90);
ctr = 0;
}
}
}
void __do_copy_data(void) __attribute__((naked, section (".init4"), used));
void __do_copy_data(void) { }
|
