summaryrefslogtreecommitdiff
path: root/kbc.c
blob: 95665c95fd9bc0992a655e021eb6560b458962bb (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
#define F_CPU 8*1000000UL
#include <stdint.h>
#include <string.h>
#include <avr/io.h>
#include <avr/interrupt.h>
#include <avr/sleep.h>
#include <avr/pgmspace.h>
#include <avr/eeprom.h>
#include <util/delay.h>

#ifndef PIN
#error need to define a PIN
#endif

#ifndef MASTER_PIN
#error need to define a MASTER_PIN
#endif

/* port B		RJ45
 *  0
 *  1 BEEP (OC1A)
 *  2 SS		up:8
 *  3 MOSI		up:2		was: LOCK - output broken!
 *  4 MISO		up:4		UNLOCK
 *  5 SCK		up:7		LOCK
 * port C
 *  0-3
 *  4 (SDA)
 *  5 (SCL)
 * port D
 *  0 PS2_DATA (RXD)	kb:3
 *  1 PS2_DATA_O (TXD)
 *  2
 *  3 PS2_CLK_O (INT1)
 *  4 PS2_CLK (XCK)	kb:2
 *  5 PS2_PWREN
 *  6-7
 */

#define D_DATA		(1 << 0)
#define D_CLK		(1 << 4)
#define D_PWR		(1 << 5)

#define B_BEEP		(1 << 1)
#define B_FEEDBACK	(1 << 2)
#define B_OPEN		(1 << 4)
#define B_CLOSE		(1 << 5)

#define B_MISO		(1 << 4)

#define MAXTRIES	3

enum state {
	STATE_NONE = 0,
	STATE_FAILURE,
	STATE_POWERUP,
	STATE_INITRESET,
	STATE_CONFIG,
	STATE_IDLE,
	STATE_IDLEBLINK,
	STATE_PASSWORD,
	STATE_PASSWORD2,
	STATE_INPUT,
	STATE_ACCEPT,
	STATE_REJECT,
	STATE_KEYMATIC_RECHECK,
	STATE_KEYMATIC_RECLOSE,
#ifdef KILLSWITCH
	STATE_ERROR,
#endif
};

/* state is the current system state */
static volatile enum state state;

/* system will advance to nextstate on return to main, if nextstate is != STATE_NONE */
static volatile enum state nextstate;

/* system will advance to toutstate on timeout. */
static volatile enum state toutstate;

static void power_up()
{
	DDRD = D_PWR;
	PORTD = D_DATA | D_CLK;
}

static void power_down()
{
	DDRD = D_PWR;
	PORTD = D_PWR;
}

static void usart_rx()
{
	UCSR0A = 0;
	UCSR0B = (1 << RXCIE0)				/* recv int en */
		| (1 << RXEN0);				/* do RX */
}

static void usart_rxpoll()
{
	UCSR0A = 0;
	UCSR0B = (1 << RXEN0);				/* do RX*/
}

static void usart_dis()
{
	UCSR0B = 0;
	(void)UDR0;
}

#if 0
static uint8_t dbgtx[64];
static uint8_t dbgpos;

static void dbg_wr(uint8_t what)
{
	cli();
	if (dbgpos < sizeof(dbgtx))
		dbgtx[dbgpos++] = what;
	SPCR = (1 << SPIE) | (1 << SPE);
	sei();
}

ISR(SPI_STC_vect)
{
	if (dbgpos) {
		SPDR = dbgtx[0];
		for (uint8_t c = 0; c < sizeof(dbgtx); c++)
			dbgtx[c] = dbgtx[c + 1];
		dbgpos--;
	} else {
		SPDR = 0xff;
		SPCR = (1 << SPE);
	}
}

static void dbg_init(void)
{
	DDRB |= B_MISO;
	/* MSB first, cpol = rise,fall, cpha = sample(r),setup(f) */
	SPCR = (1 << SPIE) | (1 << SPE);
}
#else
#define dbg_init()
#define dbg_wr(x)
#endif

static volatile uint8_t statecntr = 0;

#define mayabort if (TIFR0 & (1 << TOV0)) return bit;
#define _wait_CLK(cond) while(cond) { mayabort; }
#define wait_CLKlo _wait_CLK(  PIND /* & p0 & p1 & p2 */ & D_CLK)
#define wait_CLKhi _wait_CLK(!(PIND /* & p0 & p1 & p2 */ & D_CLK))
#define wait_CLK wait_CLKhi; wait_CLKlo; _delay_us(15)
#define wait_CLKb

#define wait_CLK_set wait_CLKlo
#define wait_CLK_samp wait_CLKhi

static void timer_return(void)
{
	TCNT0 = 0;
	TIFR0 = (1 << TOV0);
	__asm__ volatile("nop\n");
	TIMSK0 = (1 << TOIE0);
}

static void timer_clear(void)
{
	TCNT0 = 0;
	__asm__ volatile("nop\n");
	TIFR0 = (1 << TOV0);
}

static uint16_t do_send_byte(uint8_t byte)
{
	uint8_t bit = 0, parity = 1, rv, usarts;

	usart_dis();

	_delay_us(5);

	/* make clock low, request clock from keyboard */
	PORTD &= ~D_CLK;
	DDRD |= D_CLK;

	_delay_us(166);

	PORTD &= ~D_DATA;
	DDRD |= D_DATA;

	// _delay_us(3);

	DDRD &= ~D_CLK;
	PORTD |= D_CLK;

	wait_CLK_samp;

	/* data bits */
	for (bit = 0; bit < 8; bit++) {
		wait_CLK_set;
		if (byte & 1) {
			PORTD |= D_DATA;
			parity ^= 1;
		} else {
			PORTD &= ~D_DATA;
		}
		byte >>= 1;
		wait_CLK_samp;
	}

	timer_clear();

	bit = 0x10;
	/* parity */
	wait_CLK_set;
	if (parity)
		PORTD |= D_DATA;
	else
		PORTD &= ~D_DATA;
	wait_CLK_samp;

	bit = 0x11;
	/* stop bit */
	wait_CLK_set;
	PORTD |= D_DATA;
	wait_CLK_samp;
	DDRD &= ~D_DATA;

#if 0
	bit = 0x12;
	/* ACK from keyboard */
	wait_CLK_set;
	wait_CLK_samp;
#endif

	bit = 0x14;
	while (PIND & D_DATA) { mayabort; }
	bit = 0x15;
	while (!(PIND & D_DATA)) { mayabort; }

	wait_CLKhi;

	/* response from keyboard */

	timer_clear();
	bit = 0x16;
	usart_rxpoll();

	usarts = 0;
	while (!(usarts & ((1 << RXC0) | (1 << UPE0) | (1 << FE0)))) {
		__asm__ volatile("nop\nnop\n");
		usarts = UCSR0A;
		if (TIFR0 & (1 << TOV0)) {
			TIFR0 = (1 << TOV0);
			if (++bit == 0x27)
				return bit;
		};
	}

	rv = UDR0;
	return rv | 0x100;
}

static uint8_t send_byte(uint8_t byte)
{
	uint16_t rv;
	uint8_t attempts;

	/* stop timer, use for ourselves to enforce 8 ms timeout */
	TIMSK0 = 0;

	for (attempts = 5; attempts; attempts--) {
		TCNT0 = 0;
		__asm__ volatile("nop\n");
		TIFR0 = (1 << TOV0);

		rv = do_send_byte(byte);
		if (rv == 0x1fa)
			goto out;

		/* clear state, wait, retry */
		DDRD &= ~(D_DATA | D_CLK);
		PORTD |= D_DATA | D_CLK;

		if (rv == 0x1fe)
			_delay_ms(33);
	}

	dbg_wr(0x01);
	dbg_wr(0x80 | (byte & 0x0f));
	dbg_wr(0x80 | (byte >> 4));

out:
	/* hand back timer to state machine */
	timer_return();
	usart_rx();
	return rv;
}

static uint8_t wait_byte(void)
{
	uint8_t data, usarts;

	usart_rxpoll();
	/* stop timer, use for ourselves to enforce 8 ms timeout */
	TIMSK0 = 0;
	TCNT0 = 0;
	TIFR0 |= (1 << TOV0);

	usarts = 0;
	while (!(usarts & ((1 << RXC0) | (1 << UPE0) | (1 << FE0)))) {
		if (TIFR0 & (1 << TOV0)) {
			(void)UDR0;
			timer_return();
			usart_rx();

			return 0;
		}

		__asm__ volatile("nop\nnop\n");
		usarts = UCSR0A;
	}

	data = UDR0;
	timer_return();
	usart_rx();

	return data;
}

#define KBLED_STATE 0x02
#define KBLED_ERROR 0x04
#define KBLED_OK    0x01

#define CNTRTOP		122

#define ENTER_FAIL	1
#define WAIT_FAIL	5
#define WAIT_POWERUP	3
#define WAIT_INIT	3
#define WAIT_IDLE	3

#define WAIT_IDLEBLINK	1	/* no full cycle */
#define CNTR_BLINK	6
#define CNTR_ERROR	61
#define CNTR_BEEP	10
#define CNTR_BEEP_ACK	30
#define CNTR_BEEP_REJ	92

#define WAIT_INPUT	6
#define WAIT_ACCEPT	8
#define WAIT_REJECT	8
#define WAIT_KEYMATIC_RETRY	9

#define CNTR_KEYMATIC	30
/*	CNTR_BEEP_ACC	== CNTR_KEYMATIC */

static uint8_t cntr = 0;
static uint8_t close_try = 0;
static uint8_t idle_looped = 0;
#ifdef KILLSWITCH
static uint8_t error;
#endif

static EEMEM uint8_t passwd[sizeof(PIN) - 1] = PIN;
static EEMEM uint8_t mpasswd[sizeof(MASTER_PIN) - 1] = MASTER_PIN;
static uint8_t code[sizeof(PIN)];
static uint8_t new_code[sizeof(PIN)];

static void state_enter(void)
{
	switch (state) {
	case STATE_NONE:
	case STATE_FAILURE:
		toutstate = STATE_POWERUP;
		statecntr = WAIT_FAIL;
		usart_dis();
		power_down();
		break;
	case STATE_POWERUP:
		toutstate = STATE_INITRESET;
		statecntr = WAIT_POWERUP;
		power_up();
		usart_rx();
		break;
	case STATE_INITRESET:
		toutstate = STATE_FAILURE;
		statecntr = WAIT_INIT;
		send_byte(0xff);
		break;
	case STATE_CONFIG:
		/* statecntr not used */
		toutstate = STATE_FAILURE;
		nextstate = STATE_FAILURE;
		if (send_byte(0xed) != 0xfa)
			break;
		if (send_byte(0x00) != 0xfa)
			break;
		/* identify */
		if (send_byte(0xf2) != 0xfa)
			break;
		if (wait_byte() != 0xab)
			break;
		if (wait_byte() != 0x83)
			break;
#if 0
		/* scan code set 3 */
		if (send_byte(0xf0) != 0xfa)
			break;
		if (send_byte(0x03) != 0xfa)
			break;
		/* make codes only */
		if (send_byte(0xf9) != 0xfa)
			break;
#endif
		nextstate = STATE_IDLE;
		break;
	case STATE_IDLE:
		memset(code, 0, sizeof(code));
		toutstate = STATE_IDLEBLINK;
		statecntr = WAIT_IDLE;
		nextstate = STATE_FAILURE;
		if (send_byte(0xed) != 0xfa)
			break;
		if (send_byte(0x00) != 0xfa)
			break;

		/* We have some issues with the keyboard failing every
		 * now and then. Until we know more about the issue,
		 * reset it every 256th time we enter STATE_IDLE :/ */
		idle_looped += 1;
		if (idle_looped != 0xff)
			nextstate = STATE_NONE;
		break;
	case STATE_IDLEBLINK:
		toutstate = STATE_IDLE;
		statecntr = WAIT_IDLEBLINK;
		nextstate = STATE_FAILURE;
		if (send_byte(0xed) != 0xfa)
			break;
		if (send_byte(KBLED_STATE) != 0xfa)
			break;
		nextstate = STATE_NONE;
		cntr = CNTR_BLINK;
		break;
	case STATE_INPUT:
		toutstate = STATE_IDLE;
		idle_looped = 0; /* input still works, reset idle counter */
		statecntr = WAIT_INPUT;
		if (send_byte(0xed) != 0xfa)
			break;
		if (send_byte(KBLED_STATE) != 0xfa)
			break;
		break;
	case STATE_PASSWORD:
	case STATE_PASSWORD2:
		toutstate = STATE_IDLE;
		statecntr = WAIT_INPUT;
		if (send_byte(0xed) != 0xfa)
			break;
		if (send_byte(KBLED_STATE | KBLED_OK) != 0xfa)
			break;
		break;
	case STATE_ACCEPT:
		toutstate = close_try ? STATE_KEYMATIC_RECHECK : STATE_IDLE;
		statecntr = WAIT_ACCEPT;
		if (send_byte(0xed) != 0xfa)
			break;
		if (send_byte(KBLED_OK) != 0xfa)
			break;
		break;
	case STATE_REJECT:
		toutstate = STATE_IDLE;
		statecntr = WAIT_REJECT;
		if (send_byte(0xed) != 0xfa)
			break;
		if (send_byte(KBLED_ERROR) != 0xfa)
			break;
		break;
	case STATE_KEYMATIC_RECHECK:
		if (!close_try || !(PINB & B_FEEDBACK)) {
			close_try = 0;
			nextstate = STATE_IDLE;
			return;
		}
		if (send_byte(0xed) != 0xfa)
			break;
		if (send_byte(KBLED_OK | KBLED_ERROR) != 0xfa)
			break;

		close_try--;

		cntr = CNTR_KEYMATIC;
		statecntr = WAIT_KEYMATIC_RETRY;
		toutstate = STATE_KEYMATIC_RECLOSE;

		PORTB &= ~(B_OPEN | B_BEEP);
		break;
	case STATE_KEYMATIC_RECLOSE:
		cntr = CNTR_KEYMATIC;
		statecntr = WAIT_KEYMATIC_RETRY;
		toutstate = STATE_KEYMATIC_RECHECK;

		PORTB &= ~(B_CLOSE | B_BEEP);
		break;
#ifdef KILLSWITCH
	case STATE_ERROR:
		toutstate = STATE_ERROR;
		statecntr = 1;
		cntr = CNTR_ERROR;
		error ^= KBLED_ERROR;
		if (send_byte(0xed) != 0xfa)
			break;
		if (send_byte(error) != 0xfa)
			break;
		break;
#endif
	}
}

ISR(TIMER0_OVF_vect)
{
	if (!--cntr) {
		cntr = CNTRTOP;

		PORTB = B_OPEN | B_CLOSE | B_BEEP;

		if (statecntr)
			statecntr--;
	}
}

#define ESC	0x1b
#define ENT	0x0d

#define KBC_BASE 0x16
const PROGMEM uint8_t kbc[] = {
/*	 0    1    2    3    4    5    6    7
 *	 8    9    a    b    c    d    e    f
 */
	                              '1', '_', /* 10 - 17 */
	'_', '_', '_', '_', '_', '_', '2', '_', /* 18 - 1f */
	'_', '_', '_', '_', '_', '4', '3', '_', /* 20 - 27 */
	'_', '_', '_', '_', '_', '_', '5', '_', /* 28 - 2f */
	'_', '_', '_', '_', '_', '_', '6', '_', /* 30 - 37 */
	'_', '_', '_', '_', '_', '7', '8', '_', /* 38 - 3f */
	'_', '_', '_', '_', '_', '0', '9', '_', /* 40 - 47 */
	'_', '_', '_', '_', '_', '_', '_', '_', /* 48 - 4f */
	'_', '_', '_', '_', '_', '_', '_', '_', /* 50 - 57 */
	'_', '_', ENT, '_', '_', '_', '_', '_', /* 58 - 5f */
	'_', '_', '_', '_', '_', '_', '_', '_', /* 60 - 67 */
	'_', '1', '_', '4', '7', '_', '_', '_', /* 68 - 6f */
	'0', '_', '2', '5', '6', '8', ESC, ESC, /* 70 - 77 */
	'_', '_', '3', '_', '_', '9'            /* 78 - 7f */
};

#define NUMPAD_ENTER 0xda	/* e0 5a */
#define F12 0x07

static uint8_t pressed = 0, e0 = 0, release = 0;

static void handle_keypress(uint8_t data)
{
	uint8_t unlock, lock, change_pass;
	uint8_t ascii = '_';
	uint8_t c;

	if (release) {
		pressed = 0;
		release = 0;
		e0 = 0;
		return;
	}
	if (data == pressed)
		return;

	if (data == 0xe0) {
		e0 = 0x80;
		return;
	}
	if (data == 0xf0) {
		release = 1;
		return;
	}
	if (data >= 0x80)
		return;

	pressed = data;

	data |= e0;
	e0 = 0;

	if (data >= KBC_BASE && data < KBC_BASE + sizeof(kbc))
		ascii = pgm_read_byte(kbc + data - KBC_BASE);

	dbg_wr(0x03);
	dbg_wr(0x80 | (ascii & 0xf));
	dbg_wr(0x80 | (ascii >> 4));

	if (state != STATE_PASSWORD && state != STATE_PASSWORD2) {
		lock = ascii == ESC;
		unlock = ascii == ENT || data == NUMPAD_ENTER;
		change_pass = data == F12;
	} else {
		lock = unlock = 0;
		change_pass = ascii == ENT || data == NUMPAD_ENTER;
	}

	if (change_pass) {
		uint8_t pos, ok = 1;
		switch(state) {
		default:
			/* Check master password, change state to password input */
			if (code[0])
				ok = 0;

			for (pos = 1; pos < sizeof(code); pos++)
				if(code[pos] != eeprom_read_byte(mpasswd + pos - 1))
					ok = 0;

			if (ok) {
				cntr = CNTR_BEEP_ACK;
				nextstate = STATE_PASSWORD;
			}
			break;
		case STATE_PASSWORD:
			/* Check password and store it to buffer */
			if (code[0])
				ok = 0;

			if (ok) {
				memcpy(new_code, code, sizeof(code));
				PORTB &= ~B_BEEP;
				cntr = CNTR_BEEP_ACK;
				nextstate = STATE_PASSWORD2;
			}
			break;
		case STATE_PASSWORD2:
			/* Compare password with buffer, write to eeprom */
			if (memcmp(new_code, code, sizeof(code)))
				ok = 0;
			if (ok) {
				eeprom_update_block(new_code + 1, passwd,
						sizeof(new_code) - 1);
				PORTB &= ~B_BEEP;
				cntr = CNTR_BEEP_REJ;
				nextstate = STATE_ACCEPT;
			}
			break;
		}
		if (!ok) {
			PORTB &= ~B_BEEP;

			cntr = CNTR_BEEP_REJ;
			nextstate = STATE_REJECT;
		}
		memset(code, 0, sizeof(code));
		return;
	}

	if (lock || unlock) {
		uint8_t pos, ok = 1;

		/* passwd:  a  b  c  d
		 * code:   \0  a  b  c  d
		 */

		if (code[0])
			ok = 0;
#ifdef KILLSWITCH
		if (!memcmp("9164", code + 1, 4)) {
			error = 0;
			nextstate = STATE_ERROR;
			return;
		}
#endif
		for (pos = 1; pos < sizeof(code); pos++)
			if (code[pos] != eeprom_read_byte(passwd + pos - 1))
				ok = 0;

		if (!ok) {
			PORTB &= ~B_BEEP;

			cntr = CNTR_BEEP_REJ;
			nextstate = STATE_REJECT;
		} else {
			if (lock) {
				PORTB &= ~(B_CLOSE | B_BEEP);
				close_try = MAXTRIES;
			} else {
				PORTB &= ~(B_OPEN | B_BEEP);
			}

			cntr = CNTR_KEYMATIC;
			nextstate = STATE_ACCEPT;
		}
		memset(code, 0, sizeof(code));
		return;
	}

	for (c = 0; c < sizeof(code) - 1; c++)
		code[c] = code[c + 1];
	code[c] = ascii;

	PORTB &= ~B_BEEP;
	cntr = CNTR_BEEP;
	switch (state) {
	case STATE_PASSWORD:
		nextstate = STATE_PASSWORD;
		break;
	case STATE_PASSWORD2:
		nextstate = STATE_PASSWORD2;
		break;
	default:
		nextstate = STATE_INPUT;
	}
}

ISR(USART_RX_vect)
{
	uint8_t data = UDR0;

	dbg_wr(0x80 | (data & 0x3f));
	dbg_wr(0x84 | (data >> 6));

	switch (state) {
	case STATE_POWERUP:
	case STATE_INITRESET:
		if (data == 0xaa)
			nextstate = STATE_CONFIG;
		break;
	case STATE_IDLE:
	case STATE_IDLEBLINK:
	case STATE_PASSWORD:
	case STATE_PASSWORD2:
	case STATE_INPUT:
		handle_keypress(data);
	default:
		break;
	}
}

int main()
{
	dbg_init();

	PORTB = B_OPEN | B_CLOSE | B_BEEP;
	DDRB  = B_OPEN | B_CLOSE | B_BEEP;

	/* /256 = 31'250 Hz = 32 µs per 1 unit
	 * /256 = 122 Hz = 8'192 µs per for overflow
	 * /122 = 1,0006 Hz = 1 s per CNTRTOP */
	TCCR0A = 0;
	TIMSK0 = (1 << TOIE0);
	TCCR0B = (1 << CS02);

	UCSR0C = (1 << UMSEL00)				/* synch mode */
		| (1 << UPM01) | (1 << UPM00)		/* odd parity */
		| (1 << UCSZ01) | (1 << UCSZ00)		/* 8-bit chars */
		| (0 << UCPOL0);			/* polarity: sample on falling */

	state = STATE_FAILURE;
	nextstate = STATE_NONE;
	state_enter();

	for (int i = 0; i < 5000; i++) {
		__asm__ volatile("nop\nnop\n");
	}

	sei();
	while (1) {
		if (nextstate != STATE_NONE) {
			state = nextstate;
			nextstate = STATE_NONE;
			state_enter();
		} else if (!statecntr) {
			state = toutstate;
			nextstate = STATE_NONE;
			state_enter();
		}
	}
}